The present disclosure relates generally to electronic circuits, and more particularly to a method and an apparatus for improving the performance of amplifiers.
FIG. 1A illustrates a circuit diagram of a differential amplifier 100, which is often used as an input stage for integrated circuit (IC) amplifiers that are typically included in mixed signal processing, radio frequency (RF) transceivers, and wireless communication applications. A differential input signal 110 that is applied to terminals INP 112 and INM 114 respectively is amplified by transistors M1P 120 and M1M 130 respectively. Both the transistors M1P 120 and M1M 130 are driven by a current source 140 (also referred to as a tail current source). The differential input signal 110 is amplified by a transconductance gain factor gm to generate an output signal 150 presented across output terminals OUTP 160 and OUTM 162. A load resistor RLP 170 is coupled between the output terminal OUTP 160 and a voltage reference 180. Similarly, a load resistor RLM 172 is coupled between the output terminal OUTM 162 and the voltage reference 180. The load resistors RLP 170 and RLM 172 are preferably identical to balance the differential amplifier 100. Well known performance metrics for the differential amplifier 100 often include a common mode rejection ratio (CMRR) and a power supply rejection ratio (PSRR).
FIG. 1B illustrates a circuit diagram of a differential amplifier 102 having a feedback loop 104 to improve performance including improvement in the CMRR and PSRR ratios. A pair of resistors RB 182 is coupled between the output terminals OUTP 160 and OUTM 162, the pair of resistors RB 182 forming a node NBAL 184. Thus, voltage at NBAL 184 is the common mode voltage measured between the output terminals OUTP 160 and OUTM 162. An operational amplifier (OA) 190 includes a positive terminal coupled to the node NBAL 184 and a negative terminal coupled to a reference voltage VCMREF 192. The OA 190 generates an output VOUT 194 in response to the inputs received from the node NBAL 184 and VCMREF 192. The output VOUT 194 is provided as a feedback to control transistors M2P 174 (coupled in parallel with RLP 170) and M2M 176 (coupled in parallel with RLM 172). In a balanced state, the voltage at NBAL 184 is equal to the reference voltage VCMREF 192, the current flowing through M2P 174 and M2M 176 is at a fixed known (minimum) current value to overcome component variations and the voltage VOUT 194 is determined accordingly and may have a direct current (DC) bias. Thus, a feedback loop 104 controls an amount of current flowing through the resistors RLP 170 and RLM 172 in response to a change (positive or negative) in the differential input signal 110.
The differential amplifier circuit 102 is, however, sensitive to component variations often present in IC's manufactured using deep sub-micron technology. A large variation in a value of resistor RLP 170 compared to that of RLM 172 may cause the feedback loop 104 to go out-of-range since the current flowing through M2P 174 and M2M 176 approaches zero. To achieve a balanced circuit, it is a common practice to trim the value of resistors RLP 170 and RLM 172 in order to minimize the impact of component variations. The prior art resistive trimming techniques may typically include laser trimming, blowing fusable links, or shorting diodes. However, such resistive trimming procedures often require that a separate trimming circuit be physically present on the same IC as the differential amplifier circuit 102, thereby increasing the silicon area. In addition, such trim procedures rely on an accurate matching of a benchmark resistor included in the trimming circuit with resistors RLP 170 and RLM 172 used in the actual circuit. Therefore, a need exists to provide an improved differential amplifier having a resistive load that is capable of being trimmed efficiently without incurring a substantial penalty in noise performance, power consumption, and silicon area.